Processor Settings

Use this window to control the processor(s) settings.

NOTE: The help page may include information about features and values that are not supported on your system. Server Administrator displays only the features and values that are supported on your system.

User Privileges

Table 1. User Privileges
Selection View Manage
Processor Settings Administrator, Elevated Administrator (Linux only) Administrator, Elevated Administrator (Linux only)
NOTE: For more details on user privilege levels, see Privilege levels in the Server Administrator GUI.

Logical Processor

Each processor core supports up to two logical processors. Generally, higher processor count results in increased performance for most multi-threaded workloads and the recommendation is to keep the option Enabled. However, there are some floating point or scientific workloads, including HPC workloads, where disabling this feature may result in higher performance.

Enabled (default) The BIOS reports all logical processors.
Disabled The BIOS only reports one logical processor per core.

Virtualization Technology

Enabled When the option is set to Enabled, the BIOS enables processor Virtualization features and provides the virtualization support to the operating system through the DMAR table. In general, only virtualized environments such as VMware(r) ESX(tm), Microsoft Hyper-V(r), Red Hat(r) KVM, and other virtualized operating systems takes advantage of these features.
Disabled Disabling this feature is not known to significantly alter the performance or power characteristics of the system. Recommended to set this option to Enabled, in most cases.

Kernel DMA Protection

For Intel platforms: When set to Enabled, using Virtualization Technology, BIOS, and operating system enables direct memory access protection for DMA capable peripheral devices. Enable Virtualization Technology to use this option.

For AMD platforms: When set to Enabled, using IOMMU, BIOS and operating system enables direct memory access protection for DMA capable peripheral devices. Enable IOMMU support to use this option.

Address Translation Services (ATS)

Defines the Address Translation Cache (ATC) behavior for devices to cache DMA translations. This field provides an interface to address translation of a chipset and protection table to translate DMA addresses to host addresses.

Directory Mode

Controls directory mode.

Adjacent Cache Line Prefetch

When the option is set to Enabled (default), the system is optimized for applications that require high utilization of sequential memory access. Set the option to Disabled for applications that require high utilization of random memory access.

Hardware Prefetcher

Enables or disables the hardware prefetcher.

Enabled When the option is set to Enabled, the processor can prefetch extra cache lines for every memory request. This setting can affect performance, depending on the application running on the server and memory bandwidth utilization.

DCU Streamer Prefetcher

Enables or disables Data Cache Unit (DCU) Streamer Prefetcher. This setting can affect performance, depending on the application running on the server. Recommended for High Performance Computing applications.

DCU IP Prefetcher

Enables or disables Data Cache Unit (DCU) IP Prefetcher. This setting can affect performance, depending on the application running on the server. Recommended for High Performance Computing applications.

System Isochronous Mode

When the option is set to Enabled, System Isochronous Mode reduces latency of memory transactions at the expense of bandwidth. Recommended to set the option to Enabled, for real-time audio and video streaming applications. Recommended to set the option to Disabled, for applications which needs highest memory bandwidth especially with a large number of cores under heavy utilization.

Sub NUMA Cluster

Sub NUMA Clustering (SNC) is a feature breaks up the LLC into disjoint clusters based on address range, with each cluster bound to a subset of the memory controllers in the system. It improves average latency to the LLC. SNC is Disabled if Persistent Memory is installed in the system.

MADT Core Enumeration

The field determines how BIOS enumerates processor cores in the ACPI MADT table.

Round Robin When set to Round Robin, processor cores are enumerated in a Round Robin order to evenly distribute interrupt controllers for the operating system across all Sockets and Dies.
Linear When set to Linear, processor cores are enumerated across all Dies within a Socket before enumerating additional Sockets for a linear distribution of interrupt controllers for the operating system.

UPI Prefetch

UPI Prefetch is a mechanism to get the memory read started early on DDR bus, the UPI Rx path spawns a MemSpecRd to iMC directly.

XPT Prefetch

XPT prefetch is a mechanism that enables the MS2IDI to take a read request that is being sent to the LLC and speculatively issue a copy of that read to the memory controller.

LLC Prefetch

Enables or disables LLC Prefetch on all threads.

Dead Line LLC Alloc

Controls dead lines fill in LLC.

Enabled Opportunistically fill dead lines in LLC.
Disabled Never fill dead lines in LLC.

Directory AtoS

AtoS optimization reduces remote read latencies for repeat read accesses without intervening writes.

AVX P1

AVX P1 level selection.

Dynamic SST-Performance Profile

Allows the reconfiguration of the processor via Dynamic or Static SST-PP select.

SST-Performance Profile

Allows the reconfiguration of the processor via Speed Select Technology (SST).

Intel SST-BF

Enable Intel SST-BF. It is only allowed in Performance Per Watt (OS) or Custom (when OSPM is enabled) system profiles.

Intel SST-CP

RAPL Prioritization allows creating core groups of different priority.

x2APIC Mode

Enables or disables x2APIC mode. Compared to the traditional xAPIC architecture, x2APIC extends processor addressability and enhances interrupt delivery performance. Virtualization Technology is set to Enabled to allow enabling and disabling of x2APIC mode. The x2APIC mode is forced to Disabled when Virtualization Technology is disabled.

AVX ICCP Pre-Grant License

Enables or disables the selection of different AVX ICCP transition levels offered by Intel. This option is set to Disabled by default.

Number of Cores per Processor

Controls the number of enabled cores in each processor. Under certain circumstances, you may see limited performance improvements to Boost Technology and benefit from potentially larger shared caches if you reduce the number of enabled cores. Most computing environments tend to benefit more from larger number of processing cores, so you must carefully weigh the disabling of cores to gain nominal performance enhancements.

CPU Physical Address Limit

Limit CPU physical address to 46 bits to support older Hyper-V. If enabled, automatically disables TME-MT.

Processor Core Speed

Displays the clock speed of the processor(s).

Local Machine Check Exception

Enables or disables the LMCE feature. This is an extension of the MCA Recovery mechanism providing the capability to deliver Uncorrected Recoverable (UCR) Software Recoverable Action Required (SRAR) errors to one or more specific logical processor threads receiving previously poisoned or corrupted data. When set to Enabled, the UCR SRAR Machine Check Exception is delivered only to the affected thread rather than broadcast to all threads in the system. The feature supports operating system recovery for cases of multiple, recoverable faults detected in close proximity which would otherwise result in a fatal machine check event. The feature is available only on Advanced RAS processors.

Family-Model-Stepping

Displays the processor's family, model, and stepping values.

Brand

Displays the brand text provided by the processor manufacturer.

Level 2 Cache

Displays the amount of memory in the corresponding processor cache.

Level 3 Cache

Displays the amount of memory in the corresponding processor cache.

Number of Cores

Displays the number of cores in the processor package.

Microcode

Indicates the microcode update signature.

Processor 64-bit Support

Specifies whether the installed processor(s) support 64-bit extensions.

Processor n Controlled Turbo

Displays the processor controlled turbo. Enable this option only when System Profile is set to Performance. The default option is Disabled.

Configurable TDP

Displays the configurable Thermal Design Power (TDP).

Alternate RTID (Requestor Transaction ID) setting

Enabled Allocates more RTIDs to the remote socket increasing cache performance between the sockets.
Disabled (default) Normal mode for NUMA.

QPI Speed

Controls QuickPath Interconnect data rate settings.

Execute Disable

Specifies whether Execute Disable Memory Protection Technology is enabled.

Enabled (default) The Execute Disable Memory Protection Technology is enabled.
Disabled The Execute Disable Memory Protection Technology is disabled.

CPU Interconnect Speed

Controls the frequency of the communication links among the CPUs in the system. Note that standard and basic bin processors support lower link frequencies than the advanced parts do.

Processor Bus Speed

Displays the bus speed of the processor(s).

Logical Processor Idling

Enables or disables the operating system capability to group logical processors in the idling state in order to reduce power consumption.

For more information on the other buttons present in the Server Administrator Action pages, see Server Administrator Window Buttons.